Hardware

Cell Delay modeling for TSV induced stress in 3D ICs

A holistic model to determine the threshold voltage and mobility changes around a TSV, and thus, delay through an inverter and a 2 input NAND gate. The final model needed coordinates of the cell to calculate the propagation delay.

Design of Analog Neuromorphic Circuits

Designed the circuit of a Pulse-Based Analog Velocity Sensor. Pixels were designed to detect the edge of an object using contrasting lights. Multiple pixels were then used to measure the velocity of a moving object.

Delay Modelling of a Static flip flop

A compact delay model to calculate delay through an Inverter-Transmission gate, considered as a single entity. Captured the effects of series stacking and parasitic capacitances while calculating delay.

Propeller Clock

Developed a clock (Analog and Digital) using a rotating PCB consisting of a linear array of LEDs, based on the principle of the Persistence of Vision. The LEDs were set to light up at fixed delays so as to show the time precisely.

Timing Calibration Algorithm for Interleaved Current Steering DAC

A feedback algorithm for removing timing mismatch problems and improving SNR of interleaved current steering DAC structures clocked at high frequency (in GHz). The algorithm developed was tested to remove the timing errors at 4GHz frequency within a margin of 0.1% and improve the SNR by more than 24 dB and ENoB (Effective no. of bits) by more than 4 bits.

I-V characteristic variations due to defects in CMOS

Studied different types of defects and the resulting shifting of bands. Simulated the corresponding changes in leakage current in MOSFET due to various forms of gate leakage and drain leakage.